Plenary Speakers

Envisioning 6G Mobile New World

Bongtae Kim

Abstract:

Through COVID-19, we experienced that the network supports for protecting our daily lives and maintaining economic vitality, and it can trigger the growth of innovative services by stable supporting for the surge in data traffic such as online video service(OTT), video conferencing, and online education. It supports for innovative service creation including expanded virtual world, digital twin, remote control and surgery, urban air mobility, and autonomous driving/operating.

   This talk begins with the story of high-speed Internet penetration in Korea overcoming the Asian financial crisis(1997). Background, strategies, and episodes related to FTTH and 4G/5G deployment, and the resulting cultural and socioeconomic changes are discussed.

    It then reviews the current status of 5G service expansion, limitations, and improvements. Emerging issues such as terrestrial to aircraft/satellites stereoscopic expansion, energy optimization under powertrain electrification followed by autonomous operation and trustworthy are discussed. Another pillar is the emergence of volumetric media(Light Field, Point Cloud, Hologram) to maximize immersion and realism. These issues are being resolved by 5G+ and/or by going to 6G. Putting together, 6G vision, key concepts, standardization, pre-trials, and candidate technologies are highlighted.

Biography:

   Bongtae Kim has 35+ years of Information and Communication Technology (ICT) R&D experience at ETRI, a government-funded organization in Korea. He has planned Intelligent Digital Transformation (IDX) strategy as a vice president of ETRI for the past 3.5 years, and he is currently serving as an advisor for ICT future technology.

   He played a key role in the development and dissemination of Korea's high-speed (FTTH) Internet and 4G/5G mobile communication technology, contributing to Korea's position as the "Best Connected Country in the World (Few Research, 2018)." He has been chairing the Optical Internet Forum Korea since 2014.

   He served as co-chair of OECC2018, COIN2014, and COIN2010 of related international academic and industry joint technical conferences.

Masayuki Ito

Director, NSITEXE Inc.

Abstract:

Efficient execution of AI and other computing on edge devices has become an important issue in embedded systems due to strict heat and cost constraints. Special HW logic IPs are not suitable due to its specific dedication. Server/HPC processors sometimes do not fit to embedded feature. Generic and flexible processors with high efficiency are required for such embedded systems. There are a couple of important architecture challenges to efficiently accelerate the computation of wide range of applications. Firstly, such processors need to solve both high-load AI computation and legacy non-symmetric control and signal processing and so well-balanced heterogeneity and good parallelism should be considered. Secondly, such processors need to achieve both high power efficiency (TOPS/W) and high silicon efficiency (TOPS/mm2) comparable to dedicated HW logic IPs.

This speech will review our architecture challenges to such new generation processors and share our viewpoints on such solutions and techniques being explored to efficiently accelerate the computation of wide range of applications for the embedded systems.

Biography:

Dr. Masayuki Ito is Director in Business Promotion Unit at NSITEXE Inc, DENSO’s subsidiary, where he focuses on developments and promotions for its own RISC-V processors and AI accelerators targeting not only for automobile but also for other industries like Factory-Automation and IoT. He has more than 25 years of experience in the semiconductor industry. He started his career in the Semiconductor Development Center in Hitachi Ltd. in Tokyo, followed by Renesas Technology Corp. and Renesas Electronics Inc. Throughout his career he consistently worked for processor and SoC development for mobile and automobile.

He holds a master's degree in Computer engineering from Kyoto University and a Ph.D. in Science and Engineering from Tokyo Institute of Technology.

Listen: ESD Protection is About Circuit Design

Albert Wang

Professor, Dept. of ECE, University of California, Riverside

Abstract:

On-chip ESD protection design is one of the most challenging IC reliability problems, still full of black magics. A common misconception has been that ESD protection design is about device design, which largely contributed to ESD design failures in IC design practices. It is time to reconsider on-chip ESD protection – it is a circuit design task within IC designs. A correct design mindset, along with comprehensive understanding of ESD protection details, becomes essential to successful on-chip ESD protection design for ICs, particularly for large, complex, high-performance ICs at advanced technology nodes and in emerging technologies. This talk reviews the evolution of and every detail of on-chip ESD protection circuit designs, from an IC design perspective. The discussion will cover ESD fundamentals, ESD Design Overhead Effect, ESD Design Window, ESD design prediction, low-parasitic ESD protection designs, holistic ESD-IC co-design methodologies, various CAD-based ESD protection design techniques, challenges of ESD protection design for RF ICs up to millimeter wave frequency and high-throughput IC beyond 10Gbps, full-chip ESD protection circuit physical design verification CAD algorithms and methods, ESD protection design for 3D chiplet-based chips using heterogeneous integration technologies, emerging CDM ESD protection design challenges, and non-traditional above-IC ESD protection concepts. Perspectives for future ESD protection designs will be outlined. The discussion will be supported by numerous practical ESD protection design examples. The takeaway: an IC designer should know about and can do good ESD protection designs.

Biography:

   Albert Wang received the BS degree from Tsinghua University and the PhD degree from State University of New York at Buffalo. He is a Professor of Electrical and Computer Engineering at University of California, Riverside, USA. He was a Staff   Design Engineer at National Semiconductor Corp in the Silicon Valley before joining Illinois Institute of Technology as an Assistant Professor of Electrical and Computer Engineering. His research covers semiconductor devices, AMXRF ICs, design-for-reliability for ICs, 3D heterogeneous integration, emerging devices and circuits, and LED visible light communications. He published two books and 315+ peer-reviewed papers, and holds 16 U.S. patents. His editorial board services include IEEE TCAS I, IEEE EDL, IEEE TCAS II, IEEE TED, IEEE JSSC, and IEEE TDMR. He is IEEE Distinguished Lecturer for IEEE EDS and was IEEE Distinguished Lecturer for IEEE CASS and SSCS. He was President of IEEE Electron Devices Society. He was Chair for the IEEE CAS Analog Signal Processing Technical Committee. His other committee services include the International Technology Roadmap for Semiconductor (ITRS) Committee, IEEE Heterogeneous Integration Roadmap (HIR) Committee, IEEE 5G Initiatives Committee, IEEE Smart Lighting Project Roadmap Committee and IEEE Fellow Committee. He was General Chair of IEEE Electron Devices Technology and Manufacturing Conference (EDTM2021) and IEEE Radio-Frequency Integrated Circuits Symposium (RFIC2016). He served as a Program Director of the National Science Foundation, USA (2019-2021). He was recipient IEEE J. J. Ebers Award and IEEE EDS Distinguished Service Award. Wang is a Fellow of National Academy of Inventors, an IEEE Fellow and an AAAS Fellow.